This invention is applicable in the field of an AC-3 Encoder, implemented on a DSP Processor and, in particular, relates to a method of encoding frequency coefficients.
Recent years have witnessed an unprecedented advancement in audio coding technology. This has led to high compression ratios while keeping audible degradation in the compressed signal to a minimum. Coders such as the AC-3 (popularly known as Dolby Digital) are intended for a variety of applications, including 5.1 channel film soundtracks, HDTV, laser discs and multimedia.
The translation of the AC-3 Encoder Standard xe2x80x9cATSC Digital Audio Compression (AC-3) Standardxe2x80x9d, Doc. A/52/10, November 1994 on to the firmware of a DSP-Core involves several phases. Firstly, the essential compression algorithm blocks for the AC-3 Encoder have to be designed. After individual blocks are completed, they are integrated into an encoding system which receives a PCM (pulse code modulated) stream, processes the signal applying signal processing techniques such as transient detection, frequency transformation, masking and psychoacoustic analysis, and produces a compressed stream in the format of the AC-3 Standard.
The coded AC-3 stream should be capable of being decompressed by any standard AC-3 Decoder and the PCM stream generated thereby should be comparable in audio quality to the original input stream. If the original stream and the decompressed stream are transparent (indistinguishable) in audible quality (at reasonable level of compression) the development moves to the third phase.
In the third phase the algorithms are simulated in a high level language (e.g. C) using the word-length specifications of the target DSP-Core. Most commercial DSP-Cores allow only fixed point arithmetic (since a floating point engine is costly in terms of area). Consequently the algorithm is translated to a fixed point solution. The word-length used is usually dictated by the ALU (arithmetic-logic unit) capabilities and bus-width of the target core. For example AC-3 Encoder on Motorola""s 56000 would use 24-bit precision since it is a 24-bit Core. Similarly, for implementation on Zoran""s ZR38000 which has 20-bit data path, 20-bit precision would be used.
If, for example, 20-bit precision is discovered to provide an unacceptable level of sound quality, the provision to use double precision always exists. In this case each piece of data is stored and processed as two segments, lower and upper words, each of 20-bit length. The accuracy of implementation is doubled but so is the computational complexity and memory requirementxe2x80x94double precision multiplication could require 6 or more cycles while single precision multiplication and addition (MAC) requires only a single cycle. Moreover, double precision also requires twice the amount of storage space.
AC-3 is a transform coder, which essentially means that the input time-domain samples are converted to frequency domain coefficients during the first step of encoding. As discussed earlier, the coefficients may be generated through a single-precision or double-precision computation, whichever is considered appropriate. Each coefficient is next represented by a mantissa and an exponent, and subjected to different encoding schemes. While it seems intuitive to store mantissas with same or more number of bits as that used to express the coefficients in order to maintain same level of accuracy, this is not always true. The mantissa generally has a bit length which is determined by a bit allocation algorithm which globally determines the number of bits to be assigned to each mantissa, based on, for example, a parametric model of human hearing. The mantissas occupy about 30% of data memory in an AC-3 Encoder System.
The present invention seeks to minimise mantissa storage requirements without affecting accuracy.
In accordance with the invention, there is provided a method of encoding, including:
representing frequency coefficients in the form of a respective exponent and mantissa;
coding the exponents; and
shifting the mantissas to compensate for changes in the exponent values, wherein the exponents comprise an original exponent set (e0,e1, . . . ,enxe2x88x921)
which is mapped to a new exponent set (e0xe2x80x2,e1xe2x80x2, . . . exe2x80x2nxe2x88x921) after coding, so as to satisfy:
∥exe2x80x2i+1xe2x88x92exe2x80x2i∥ less than D, where i=0, . . . , nxe2x88x921 and D is a maximum allowed difference between two consecutive exponents, and exe2x80x2ixe2x89xa6ei.
Preferably, modifying the mantissas includes right shifting the mantissas by a number of bits corresponding to the changes in the associated exponent value.
Preferably, the coding of the exponents is a differential coding of exponent values, followed by grouping of the coded exponents according to a predetermined exponent strategy.